CS53L21-CNZR【PDF 20/26 页】IC ADC STEREO 24BIT 98DB 32-QFN

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Sheet目录1991

16页 17页 18页 19页 [20页]21页 22页 23页 24页

DS700PP1

CS53L21

TABLE OF CONTENTS

1. PIN DESCRIPTIONS - SOFTWARE (HARDWARE) MODE .................................................................. 6

1.1 Digital I/O Pin Characteristics ........................................................................................................... 8

2. TYPICAL CONNECTION DIAGRAMS ................................................................................................... 9

3. CHARACTERISTIC AND SPECIFICATION TABLES ......................................................................... 11

SPECIFIED OPERATING CONDITIONS ............................................................................................. 11

ABSOLUTE MAXIMUM RATINGS .......................................................................................................11

ANALOG CHARACTERISTICS (COMMERCIAL - CNZ) .................................................................... 12

ANALOG CHARACTERISTICS (AUTOMOTIVE - DNZ) ..................................................................... 13

ADC DIGITAL FILTER CHARACTERISTICS ....................................................................................... 14

SWITCHING SPECIFICATIONS - SERIAL PORT ............................................................................... 14

SWITCHING SPECIFICATIONS - IC CONTROL PORT ..................................................................... 16

SWITCHING CHARACTERISTICS - SPI CONTROL PORT ................................................................ 17

DC ELECTRICAL CHARACTERISTICS .............................................................................................. 18

DIGITAL INTERFACE SPECIFICATIONS & CHARACTERISTICS ..................................................... 18

POWER CONSUMPTION .................................................................................................................... 19

4. APPLICATIONS ................................................................................................................................... 20

4.1 Overview ......................................................................................................................................... 20

4.1.1 Architecture ........................................................................................................................... 20

4.1.2 Line & MIC Inputs .................................................................................................................. 20

4.1.3 Signal Processing Engine ..................................................................................................... 20

4.1.4 Device Control (Hardware or Software Mode) ...................................................................... 20

4.1.5 Power Management .............................................................................................................. 20

4.2 Hardware Mode .............................................................................................................................. 21

4.3 Analog Inputs ................................................................................................................................. 22

4.3.1 Digital Code, Offset & DC Measurement ............................................................................... 22

4.3.2 High-Pass Filter and DC Offset Calibration ........................................................................... 23

4.3.3 Digital Routing ....................................................................................................................... 23

4.3.4 Differential Inputs .................................................................................................................. 23

4.3.4.1 External Passive Components ................................................................................... 23

4.3.5 Analog Input Multiplexer ........................................................................................................ 25

4.3.6 MIC & PGA Gain ................................................................................................................... 25

4.3.7 Automatic Level Control (ALC) .............................................................................................. 26

4.3.8 Noise Gate ............................................................................................................................ 27

4.4 Signal Processing Engine ............................................................................................................... 28

4.4.1 Volume Controls .................................................................................................................... 28

4.4.2 Mono Channel Mixer ............................................................................................................. 28

4.5 Serial Port Clocking ........................................................................................................................ 29

4.5.1 Slave ..................................................................................................................................... 30

4.5.2 Master ................................................................................................................................... 30

4.5.3 High-Impedance Digital Output ............................................................................................. 31

4.5.4 Quarter- and Half-Speed Mode .............................................................................................31

4.6 Digital Interface Formats ................................................................................................................ 31

4.7 Initialization ..................................................................................................................................... 32

4.8 Recommended Power-Up Sequence ............................................................................................. 32

4.9 Recommended Power-Down Sequence ........................................................................................ 33

4.10 Software Mode ............................................................................................................................. 34

4.10.1 SPI Control .......................................................................................................................... 34

4.10.2 IC Control ........................................................................................................................... 34

4.10.3 Memory Address Pointer (MAP) .......................................................................................... 36

4.10.3.1 Map Increment (INCR) ............................................................................................. 36

5. REGISTER QUICK REFERENCE ........................................................................................................ 37

6. REGISTER DESCRIPTION .................................................................................................................. 40

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